1. Field of the Invention
This invention relates to lead frame based semiconductor packages and a method of manufacturing the same. In one aspect, the present invention relates to a lead frame based over-molded semiconductor package with an exposed pad having an improved electrical and thermal path within the package as well as within the completed assembly of package and printed circuit board (PCB) or any other substrate material.
2. Description of the Related Art
Semiconductor packages with exposed pad (i.e., PQFN, QFN, HSOP, SOIC, QFP, TQFP, MO-188 etc.) provide a thermal path within the package to conduct heat from the integrated circuit die to the printed circuit board (PCB). After PCB assembly, the highest thermal resistance values within the intended heat path are induced by the thermal vias of PCB which lead through the PCB onto the PCB backside where a large copper plane acts as a heat sink. Thermal resistivity of the heat path can also be increased by typical assembly issues, such as solder voiding. As shown in U.S. Patent Application Publication No. 2005/0110137, conventional approaches for dissipating heat do not address the issue of the high thermal resistivity generated by the thermal vias of the PCB.
Accordingly, a need exists for a semiconductor packaging apparatus and process which reduces the thermal resistance values within the intended heat path. In addition, a need exists for a packaging device and methodology which reduces the heat path from the die attach pad to the package outside. There is also a need for device packaging that avoids the process and performance limitations associated with typical assembly issues during the packaging process. In addition, there is a need for improved semiconductor processes and devices to overcome the problems in the art, such as outlined above. Further limitations and disadvantages of conventional processes and technologies will become apparent to one of skill in the art after reviewing the remainder of the present application with reference to the drawings and detailed description which follow.
It will be appreciated that for simplicity and clarity of illustration, elements illustrated in the drawings have not necessarily been drawn to scale. For example, the dimensions of some of the elements are exaggerated relative to other elements for purposes of promoting and improving clarity and understanding. Further, where considered appropriate, reference numerals have been repeated among the drawings to represent corresponding or analogous elements.